1. Technology Field
The present invention generally relates to a flash memory storage system, and more particularly, to a multi level cell (MLC) NAND flash memory storage system simulated as a single level cell (SLC) NAND flash memory chip, a flash memory controller thereof, and an access method for simulating a MLC NAND flash memory chip into a SLC NAND flash memory chip.
2. Description of Related Art
The consumers' demand to storage media has increased drastically along with the widespread of digital cameras, camera phones, and MP3 in recently years. Flash memory is one of the most adaptable storage media for such battery-powered portable electronic products due to its characteristics such as data non-volatility, low power consumption, small volume, and non-mechanical structure. A memory card is a storage device using a NAND flash memory chip as its storage medium. Memory cards have been broadly adopted for storing personal data since they are small in volume, large in capacity, and convenient to be carried around. Thereby, flash memory has become one of the most focused electronic products in recent years.
According to existing NAND flash memory techniques, NAND flash memories can be categorized into single level cell (SLC) NAND flash memories or multi level cell (MLC) NAND flash memories according to the number of data bits which can be stored in each memory cell. To be specific, only a single-stage programming can be performed to each memory cell in a SLC NAND flash memory, and accordingly each memory cell can only store one bit. Contrarily, each physical block in a MLC NAND flash memory is programmed in multiple stages. For example, taking a MLC NAND flash memory wherein each memory cell stores two data bits as an example, as shown in FIG. 1A, each physical block is programmed in two stages. The first stage is to write into a lower page, wherein the physical characteristic of the lower page is similar to that of a SLC NAND flash memory. After the first stage, an upper page is programmed, wherein the write speed of the lower page is faster than that of the upper page. Thereby, as shown in FIG. 1B, the page addresses in each physical block can be divided into slow pages (i.e., upper page addresses) and fast pages (i.e., lower page addresses). Similarly, in a MLC NAND flash memory wherein each memory cell can store multiple data bits, each memory cell contains more page addresses and is programmed in more stages. Because a MLC NAND flash memory can provide more storage space, in recent years, SLC NAND flash memories have been gradually replaced by MLC NAND flash memories for applying to memory modules (for example, memory cards) as storage media.
However, the physical characteristic of a MLC NAND flash memory is different from that of a SLC NAND flash memory. For example, every time when data is written into a page of a MLC NAND flash memory, the page can only be programmed once. Thus, the MLC NAND flash memory is programmed in unit of pages. However, the page can be programmed multiple times in a SLC NAND flash memory. For example, when a page of the SLC NAND flash memory has 4 sectors, data can be programmed in the SLC NAND flash memory in unit of sectors, so amount of data which be programmed in the SLC NAND flash memory may be less than a capacity of one page.
In addition, each memory cell in a MLC NAND flash memory can store multiple bits. Thus, the MLC NAND flash memory has lower stability than a SLC NAND flash memory, and accordingly the MLC NAND flash memory needs to be performed an error checking and correcting procedure with an error checking and correcting code capable of checking and correcting more bits.
Moreover, taking a MLC NAND flash memory wherein each memory cell stores two data bits as an example, each MLC block can be considered as two SLC blocks. However, data can only be written into a flash memory block according to the order of its pages. Thus, when each MLC block is considered as two SLC blocks, data cannot be written into the MLC block as it is alternatively written into two SLC blocks. Furthermore, data in a flash memory is erased in unit of blocks. Thus, when each MLC block is considered as two SLC blocks, two SLC blocks are erased together to erase a MLC block.
Accordingly, even though many memory modules with MLC NAND flash memory chips have been provided, a host system supporting only a SLC NAND flash memory chip cannot support a memory module having a MLC NAND flash memory chip.